December 2nd, 2013 10:47 am | Posted in Recent
In the continuing efforts to build an effective, automated battery testing system using FPGA, Electria’s engineers have evaluated a number of soft CPU devices and settled on OpenRISC’s System on Chip (ORPSoC) device. Though device design and codes are open source, there are still challenges. Existing tutorials are based on code which is over a year old and not applicable for Electria’s specific purposes.
Electria’s engineers will author and publish an updated tutorial document and code for ORPSoc to help future users and educators, as well as to document steps on the road to an automated battery testing system. The multi-part tutorial will describe how to build a toolchain and simulator, how to run a Linux kernel in the simulator, how to build the SRAM Object file in Quartus, run Linux on real hardware, and add a peripheral device to the kernel. The code will include detailed comments to explain the significance of each section.
Though this is only one step on the path to the ultimate goal, it updates the knowledge base for the open source community and provides future coders and experimenters with shoulders to stand upon. Electria is interested to hear from public and private entities requiring coding expertise of this variety.